Joint Session PanelPPoPP 2021

This panel, which is open to the public when registering at this link, is sponsored by the USC Viterbi School of Engineering.

Date & Time

13:30 — 15:00 EST on March 3, 2021

Panelist

John L. Hennessy Stanford Professor and Chairman of Alphabet, 2017 ACM Turing Awardee	John L. Hennessy is the James F. and Mary Lynn Gibbons Professor of Computer Science and Electrical Engineering in the Stanford School of Engineering, and the Shriram Family Director of Stanford’s Knight-Hennessy Scholars, the largest fully endowed graduate-level scholarship program in the world. He is chairman of Alphabet and serves as a trustee of the Gordon and Betty Moore Foundation. Formerly the tenth president of Stanford, he is also a computer scientist who co-founded MIPS Computer Systems and Atheros Communications. John is the coauthor (with David Patterson) of two internationally used textbooks in computer architecture. His honors include the 2012 Medal of Honor of the Institute of Electrical and Electronics Engineers and the 2017 ACM A.M. Turing Award (jointly with David Patterson). John earned his bachelor’s degree in electrical engineering from Villanova University and his master’s and doctoral degrees in computer science from the Stony Brook University.
David Patterson Berkeley Professor and Google Distinguished Engineer, 2017 ACM Turing Awardee	David Patterson is a professor of the graduate school at UC Berkeley, a Distinguished Engineer at Google, Vice-Chair of the Board of Directors of the RISC-V Foundation, and Director of the RIOS Lab. He received his BA, MS, and PhD degrees from UCLA. David’s most successful research projects were likely Reduced Instruction Set Computer (RISC), Redundant Array of Inexpensive Disks (RAID), and Network of Workstation (NOW). This research led to many papers and seven books, with the best known being Computer Architecture: A Quantitative Approach, co-authored by John L. Hennessy. His most recent book is The RISC-V Reader: An Open Architecture Atlas, co-authored by Andrew Waterman. He is a member of the U.S. National Academy of Engineering, the U.S. National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. His teaching was honored with the ACM Karlstrom Award and the IEEE Mulligan Medal. As a past president of ACM and a past Chair of CRA, he received Distinguished Service Awards from both. He served as General Chair of the Tapia Conference and received the Tapia Achievement Award for Scientific Scholarship, Civic Science, and Diversifying Computing. His most recent award is the ACM A.M Turing Award, shared with John L. Hennessy.
Margaret Martonosi Princeton Professor and NSF Assistant Director of CISE, Fellow of ACM and IEEE	Margaret Martonosi is the U.S. National Science Foundation’s (NSF) Assistant Director for Computer and information Science and Engineering (CISE). With an annual budget of more than $1B, the CISE directorate at NSF has the mission to uphold the U.S.’s leadership in scientific discovery and engineering innovation through its support of fundamental research and education in computer and information science and engineering as well as transformative advances in research cyberinfrastructure. While at NSF, Margaret is on leave from Princeton University where she is the Hugh Trumbull Adams ’35 Professor of Computer Science. Margaret’s research interests are in computer architecture and hardware-software interface issues in both classical and quantum computing systems. She is an elected member of the American Academy of Arts and Sciences, and a Fellow of ACM and IEEE. In addition, she has earned the 2019 SIGARCH Alan D. Berenbaum Distinguished Service Award, the 2018 IEEE Computer Society Technical Achievement Award, and the 2010 Princeton University Graduate Mentoring Award, among other honors.
Bill Dally NVIDIA Chief Scientist and former Stanford Professor, National Academy of Engineering member	Bill Dally is Chief Scientist at NVIDIA Corporation and former chair of Computer Science at Stanford. He is developing computer systems for demanding applications including machine learning, bioinformatics, and logical inference. He has a history of designing innovative and efficient experimental computing systems. While at Bell Labs, Bill contributed to the BELLMAC32 microprocessor and designed the MARS hardware accelerator. At Caltech, he designed the MOSSIM Simulation Engine and the Torus Routing Chip which pioneered wormhole routing and virtual-channel flow control. At the Massachusetts Institute of Technology, his group built the J-Machine and the M-Machine, experimental parallel computer systems that pioneered the separation of mechanisms from programming models and demonstrated very low overhead synchronization and communication mechanisms. At Stanford University, his group developed the Imagine processor, which introduced the concepts of stream processing and partitioned register organizations, and the Merrimac supercomputer, which led to GPU computing, and the ELM low-power processor. Bill is a member of the U.S. National Academy of Engineering.
Natalie Enright Jerger U. of Toronto Professor and ACM’s Council on Diversity and Inclusion co-Chair, Fellow of IEEE and ACM Distinguished Member	Natalie Enright Jerger is a Professor of Electrical and Computer Engineering at the University of Toronto and holder of the Canada Research Chair in Computer Architecture (and was former holder of the Percy Edward Hart Professor of Electrical and Computer Engineering). Prior to joining the University of Toronto, she received her PhD degree from the University of Wisconsin-Madison studying computer architecture, co-advised by Mikko Lipasti and Li-Shiuan Peh. She received her Bachelor of Science degree in 2002 from Purdue University. In 2019, she received the McLean Award from the University of Toronto. In 2015, she was awarded an Alfred P. Sloan Research Fellowship and the CRA’s Anita Borg Early Career Award. She was the recipient of the 2014 Ontario Professional Engineers Young Engineer Medal. In 2017, she co-authored the second edition of On-Chip Networks, with Tushar Krishna and Li-Shiuan Peh. Her research focuses on networks-on-chip, approximate computing, IoT devices, and hardware acceleration. Beyond research, Natalie is also involved in outreach activities for women in computer architecture, including serving as chair of WICARCH. From 2019-2021, she is serving as the co-chair of ACM’s Council on Diversity and Inclusion. She is a Distinguished Member of the ACM and Fellow of the IEEE.
Kim Hazelwood West Coast Head of Engineering at Facebook AI Research, CRA Board Member	Kim Hazelwood is the West Coast Head of Engineering at Facebook AI Research. An engineering leader whose expertise lies at the intersection of scalable computer systems and applied machine learning, her roles at Facebook have included multiple engineering organizational leadership roles across Infrastructure and Research. Prior to Facebook, Kim held several positions including Director of Research at Yahoo Labs, Software Engineer in the datacenter division of Google, Research Scientist at Intel, and tenured Associate Professor of Computer Science at the University of Virginia. Kim holds a PhD in Computer Science from Harvard University. She is a recipient of the MIT “Top 35 Innovators under 35” award, the ACM SIGPLAN “Test of Time” Award, the CRA’s Anita Borg Early Career Award, and an NSF Career Award. She currently serves on the Board of Directors for the Computing Research Association (CRA).